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Hello Forum , please can someone help me to design the hardware of this table of logic (by the use of the logic gate) , the table is in the attachment.
Thanks in advance
Yes that's right, that is not the truth table for an xor gate.
One way to look at this problem is to see that the outputs both depend on
only one combination of the two inputs, and to try to make up a gate that
will detect this. Another way is to write out all the logic statements and
then reduce to simplest form.
An easy way for this simple problem is to simply see that when Input 1 is
high and Input 2 is low we want Output 1 to be high, so for Output 1
we could apply Input 1 to an input of a 2 input AND gate, and apply Input 2 to an
inverter and the output of the inverter to the second input of the AND gate.
We could then check over the output result by going through all four
possible input combinations. We'll find that the only way to get a 1 on the
Output 1 is to have Input 1 high and Input 2 low, as required.
Output 2 is done in the same way, except we invert Input 1 instead of Input 2
and we use a second AND gate.
Doing it this way requires two inverters and two AND gates.
The logic statement for Output 1 is: O1=I1*I2'
and for Output 2 it is: O2=I1'*I2
where the single quote mark ' is used to indicate inversion (the NOT function).
You see there problems are quite easy when there is only one single 1 in the
output and the rest zeros.
Well, if it is homework, I didn't just want to give you the answer. The goal is for you to figure it out. The link I posted has all the info you need for YOU to
figure it out
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